Library 59- Change PLL settings while STM32F4xx is running

I’ve been already talking about topic, how to properly set clock speed for your device with PLL settings. This article could be found here and it is definetelly worth of readiny, especially for beginners.

Today, it was very rainy and bad day, so I was thinking about a library that could dynamically change PLL settings. This can be used to change current consumption of your device if there is no need for very high speed clock for some time.

Changing PLL parameters could be very tricky, because you are not able to just set custom value in PLL CONFIG register and hope that it will just work. It won’t.

Here are steps, how you can change PLL settings if PLL is already running:

  • Enable HSI/HSE for system core clock
  • Select¬†HSI/HSE as system core clock and not PLL
  • Disable PLL
  • Change PLL parameters
  • Enable PLL and wait till it is ready
  • Select PLL as system core clock back

This is about 10 lines of code, but knowing that might save your life when you will see that PLL parameters are not changed when you write to register.

Notes: When you change PLL settings and if System core clock is changed, you have to know, that all peripheral buses APB1, APB2, AHB1, AHB2 and AHB3 have also different clock in relation to the system core clock.

When you change clock, you will have to reinit all of your used peripherals again. For example, USART’s baudrate settings depends on APB clock. If it is changed, baudrate is changed and will not be the same as before. This will break your received data. In example below, you will see what I’m talking about.

The same goes for all other peripheral, such as all timers, including systick timer, which might not do interrupts at desired timer period as you defined at startup.



  • Set custom PLL settings
  • Get custom PLL settings


    • STM32F4xx
    • STM32F4xx RCC
  • TM
    • defines.h

Functions and enumerations


STM32F4xx PLL clock change

STM32F4xx PLL clock change. Text in blue is a problem when USART was initialized with old settings, but system core clock changed and that also changed baudrate settings for USART.

Project is available on my Github, download library below.

TM STM32F4xx RCC Library


Owner of this site. Also electronic enthusiasts, web developer, 3D printer fan, handball player and more. Big fan of STM32F4 devices. In anticipation of the new Discovery board for STM32F7 lines.

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  • Andrii

    hey, a short question. I see that my PLL is not locked, thus its phase continuously changes compared to HSI output signal. Did u notice something like that? thanks

    • Hello,

      I didn’t noticed that.
      Are you sure that your PLL does not work from HSE source?

      • Andrii

        yes, I dont have any external clock source in my application)