TM STM32F4xx Libraries  v1.0.0
Libraries for STM32F4xx devices from Tilen Majerle
tm_stm32f4_lis302dl_lis3dsh.h
1 
55 #ifndef TM_LIS302DL_LIS3DSH_H
56 #define TM_LIS302DL_LIS3DSH_H 100
57 
68 #include "stm32f4xx.h"
69 #include "stm32f4xx_rcc.h"
70 #include "stm32f4xx_gpio.h"
71 #include "defines.h"
72 #include "tm_stm32f4_spi.h"
73 
74 /* SPI on STM32F4-Discovery board */
75 #ifndef LIS302DL_LIS3DSH_SPI
76 #define LIS302DL_LIS3DSH_SPI SPI1
77 #define LIS302DL_LIS3DSH_SPI_PINSPACK TM_SPI_PinsPack_1
78 #endif
79 
80 /* CS pin on STM32F4-Discovery board */
81 #ifndef LIS302DL_LIS3DSH_CS_PIN
82 #define LIS302DL_LIS3DSH_CS_RCC RCC_AHB1Periph_GPIOE
83 #define LIS302DL_LIS3DSH_CS_PORT GPIOE
84 #define LIS302DL_LIS3DSH_CS_PIN GPIO_Pin_3
85 #endif
86 
87 /* CS pin settings */
88 #define LIS302DL_LIS3DSH_CS_LOW LIS302DL_LIS3DSH_CS_PORT->BSRRH = LIS302DL_LIS3DSH_CS_PIN
89 #define LIS302DL_LIS3DSH_CS_HIGH LIS302DL_LIS3DSH_CS_PORT->BSRRL = LIS302DL_LIS3DSH_CS_PIN
90 
91 /* Who I am values */
92 #define LIS302DL_ID 0x3B
93 #define LIS3DSH_ID 0x3F
94 
95 /* Common registers */
96 #define LIS302DL_LIS3DSH_REG_WHO_I_AM 0x0F
97 
98 /* ----------------------------------------- */
99 /* LIS3DSH registers */
100 /* ----------------------------------------- */
101 #define LIS3DSH_WHO_AM_I_ADDR 0x0F
102 #define LIS3DSH_CTRL_REG4_ADDR 0x20
103 #define LIS3DSH_CTRL_REG1_ADDR 0x21
104 #define LIS3DSH_CTRL_REG2_ADDR 0x22
105 #define LIS3DSH_CTRL_REG3_ADDR 0x23
106 #define LIS3DSH_CTRL_REG5_ADDR 0x24
107 #define LIS3DSH_CTRL_REG6_ADDR 0x25
108 #define LIS3DSH_OUT_X_L_ADDR 0x28
109 #define LIS3DSH_OUT_X_H_ADDR 0x29
110 #define LIS3DSH_OUT_Y_L_ADDR 0x2A
111 #define LIS3DSH_OUT_Y_H_ADDR 0x2B
112 #define LIS3DSH_OUT_Z_L_ADDR 0x2C
113 #define LIS3DSH_OUT_Z_H_ADDR 0x2D
114 
115 #define LIS3DSH_SENSITIVITY_0_06G 0.06 /* 0.06 mg/digit*/
116 #define LIS3DSH_SENSITIVITY_0_12G 0.12 /* 0.12 mg/digit*/
117 #define LIS3DSH_SENSITIVITY_0_18G 0.18 /* 0.18 mg/digit*/
118 #define LIS3DSH_SENSITIVITY_0_24G 0.24 /* 0.24 mg/digit*/
119 #define LIS3DSH_SENSITIVITY_0_73G 0.73 /* 0.73 mg/digit*/
120 
121 #define LIS3DSH_DATARATE_100 ((uint8_t)0x60)
122 
123 #define LIS3DSH_FULLSCALE_2 ((uint8_t)0x00) /* 2 g */
124 #define LIS3DSH_FULLSCALE_4 ((uint8_t)0x08) /* 4 g */
125 #define LIS3DSH_FULLSCALE_6 ((uint8_t)0x10) /* 6 g */
126 #define LIS3DSH_FULLSCALE_8 ((uint8_t)0x18) /* 8 g */
127 #define LIS3DSH_FULLSCALE_16 ((uint8_t)0x20) /* 16 g */
128 #define LIS3DSH__FULLSCALE_SELECTION ((uint8_t)0x38)
129 
130 #define LIS3DSH_FILTER_BW_800 ((uint8_t)0x00) /* 800 Hz */
131 #define LIS3DSH_FILTER_BW_400 ((uint8_t)0x40)//((uint8_t)0x08) /* 400 Hz */
132 #define LIS3DSH_FILTER_BW_200 ((uint8_t)0x80)//((uint8_t)0x10) /* 200 Hz */
133 #define LIS3DSH_FILTER_BW_50 ((uint8_t)(0x80 | 0x40))//((uint8_t)0x18) /* 50 Hz */
134 #define LIS3DSH_SELFTEST_NORMAL ((uint8_t)0x00)
135 #define LIS3DSH_XYZ_ENABLE ((uint8_t)0x07)
136 #define LIS3DSH_SERIALINTERFACE_4WIRE ((uint8_t)0x00)
137 #define LIS3DSH_SM_ENABLE ((uint8_t)0x01)
138 #define LIS3DSH_SM_DISABLE ((uint8_t)0x00)
139 
140 /* ----------------------------------------- */
141 /* LIS302DL registers */
142 /* ----------------------------------------- */
143 #define LIS302DL_CTRL_REG1_ADDR 0x20
144 #define LIS302DL_CTRL_REG2_ADDR 0x21
145 #define LIS302DL_CTRL_REG3_ADDR 0x22
146 #define LIS302DL_OUT_X_ADDR 0x29
147 #define LIS302DL_OUT_Y_ADDR 0x2B
148 #define LIS302DL_OUT_Z_ADDR 0x2D
149 
150 #define LIS302DL_SENSITIVITY_2_3G 18 /* 18 mg/digit*/
151 #define LIS302DL_SENSITIVITY_9_2G 72 /* 72 mg/digit*/
152 
153 #define LIS302DL_DATARATE_100 ((uint8_t)0x00)
154 #define LIS302DL_DATARATE_400 ((uint8_t)0x80)
155 
156 #define LIS302DL_LOWPOWERMODE_ACTIVE ((uint8_t)0x40)
157 #define LIS302DL_FULLSCALE_2_3 ((uint8_t)0x00)
158 #define LIS302DL_FULLSCALE_9_2 ((uint8_t)0x20)
159 #define LIS302DL_SELFTEST_NORMAL ((uint8_t)0x00)
160 #define LIS302DL_XYZ_ENABLE ((uint8_t)0x07)
161 #define LIS302DL_SERIALINTERFACE_4WIRE ((uint8_t)0x00)
162 #define LIS302DL_BOOT_NORMALMODE ((uint8_t)0x00)
163 #define LIS302DL_BOOT_REBOOTMEMORY ((uint8_t)0x40)
164 #define LIS302DL_FILTEREDDATASELECTION_OUTPUTREGISTER ((uint8_t)0x20)
165 #define LIS302DL_HIGHPASSFILTERINTERRUPT_OFF ((uint8_t)0x00)
166 #define LIS302DL_HIGHPASSFILTERINTERRUPT_1 ((uint8_t)0x04)
167 #define LIS302DL_HIGHPASSFILTERINTERRUPT_2 ((uint8_t)0x08)
168 #define LIS302DL_HIGHPASSFILTERINTERRUPT_1_2 ((uint8_t)0x0C)
169 #define LIS302DL_HIGHPASSFILTER_LEVEL_0 ((uint8_t)0x00)
170 #define LIS302DL_HIGHPASSFILTER_LEVEL_1 ((uint8_t)0x01)
171 #define LIS302DL_HIGHPASSFILTER_LEVEL_2 ((uint8_t)0x02)
172 #define LIS302DL_HIGHPASSFILTER_LEVEL_3 ((uint8_t)0x03)
173 
185 typedef enum {
186  TM_LIS302DL_LIS3DSH_Device_Error,
187  TM_LIS302DL_LIS3DSH_Device_LIS302DL,
188  TM_LIS302DL_LIS3DSH_Device_LIS3DSH
189 } TM_LIS302DL_LIS3DSH_Device_t;
190 
211 typedef enum {
212  /* LIS3DSH */
213  TM_LIS3DSH_Sensitivity_2G,
214  TM_LIS3DSH_Sensitivity_4G,
215  TM_LIS3DSH_Sensitivity_6G,
216  TM_LIS3DSH_Sensitivity_8G,
217  TM_LIS3DSH_Sensitivity_16G,
218  /* LIS302DL */
219  TM_LIS302DL_Sensitivity_2_3G,
220  TM_LIS302DL_Sensitivity_9_2G
221 } TM_LIS302DL_LIS3DSH_Sensitivity_t;
222 
245 typedef enum {
246  /* LIS3DSH */
247  TM_LIS3DSH_Filter_800Hz,
248  TM_LIS3DSH_Filter_400Hz,
249  TM_LIS3DSH_Filter_200Hz,
250  TM_LIS3DSH_Filter_50Hz,
251  /* LIS302DL */
252  TM_LIS302DL_Filter_2Hz,
253  TM_LIS302DL_Filter_1Hz,
254  TM_LIS302DL_Filter_500mHz,
255  TM_LIS302DL_Filter_250mHz
256 } TM_LIS302DL_LIS3DSH_Filter_t;
257 
269 typedef struct {
270  int16_t X;
271  int16_t Y;
272  int16_t Z;
274 
280 extern TM_LIS302DL_LIS3DSH_Device_t TM_LIS302DL_LIS3DSH_Detect(void);
281 
293 extern TM_LIS302DL_LIS3DSH_Device_t TM_LIS302DL_LIS3DSH_Init(TM_LIS302DL_LIS3DSH_Sensitivity_t Sensitivity, TM_LIS302DL_LIS3DSH_Filter_t Filter);
294 
304 extern TM_LIS302DL_LIS3DSH_Device_t TM_LIS302DL_LIS3DSH_ReadAxes(TM_LIS302DL_LIS3DSH_t* Axes_Data);
305 
306 #endif
307 
308 
Definition: tm_stm32f4_lis302dl_lis3dsh.h:269